The Embedded Experts

Release notes for SEGGER Toolchain

Release 11. Aug 2022


Version 14.2.1

  • Improvements
    1. ARM: Optimizations improving code size.
    Program corrections
    1. Code generation for Cortex-M23 was sometimes incorrect. Fixed.

Version 14.0.1

  • Improvements
    1. Merged with clang 14.0.0
    2. ARM: Several optimizations improving code size and speed.

Version 13.2.2

  • Improvements
    1. RISCV: Removed 0-offset branches in optimization level 0.

Version 13.2.1

  • Improvements
    1. ARM: Several optimizations improving code size and speed.

Version 13.0.1

  • Improvements
    1. Minor improvement in code generation.

Version 13.0.0

  • Improvements
    1. Merged with clang 13.0.0
    2. Minor optimizations improving speed for Thumb-1 targets.

Version 12.4.0

  • Improvements
    1. Optimize handling of constants and global variables (code size and speed).

Version 12.2.4

  • Program corrections
    1. Small bug fix in code generation.

Version 12.2.1

  • Improvements
    1. Several small optimizations improving code size and speed.

Version 12.0.3

  • Program corrections
    1. Small bug fixes in code generation.

Version 12.0.2

  • Improvements
    1. Adjust list of known builtin functions with SEGGER runtime library.
  • Program corrections
    1. Under rare circumstances invalid code may be generated if optimizing for size. Fixed.

Version 12.0.0

  • Improvements
    1. Merged with clang 12.0.0
    2. Several optimizations improving code size and speed.

Version 11.4.4

  • Program corrections
    1. Under rare circumstances a tail call could be malformed. Fixed.

Version 11.4.0

  • Improvements
    1. Merged with clang 11.0.1
    2. Several optimizations improving code size for Cortex-M0, A9, A12, A15 and A17 devices.
    3. Several small optimizations improving speed.
  • Program corrections
    1. For some source code lines the debug line information was missing in the output file. Fixed.

Version 11.2.1

  • Program corrections
    1. Under certain circumstances incorrect code was generated for Cortex-M7 targets. Fixed.

Version 11.2.0

  • Improvements
    1. Improve inlining: All functions with large stack called in the same function are either all inlined or none of them are inlined.
    2. Several small optimizations improving code size and speed.

Version 11.0.3

  • Improvements
    1. Functions with large stack requirement are not inlined any more.
  • Program corrections
    1. Don't use indirect calls to weak functions to allow the linker to eliminate the call.
    2. Under certain circumstances the spiller could take a wrong register. Fixed.

Version 11.0.0

  • New features
    1. Merged with clang-11
    2. Activated function outliner when optimizing for size
  • Improvements
    1. Error "anonymous bit-field cannot have qualifiers" was turned into a warning
    2. Many improvements to the code generation and optimization

Version 10.6.6

  • New features
    1. Introduced compiler identification macro __SEGGER_CC__.
  • Program corrections
    1. MUL instructions were not coded correctly if inside an IT block, which causes the assembler to break. Fixed.


Version 2.10.0


Version 4.34.2

  • Corrections
    1. Correct mis-relocated base register during relaxation.

Version 4.34.1

  • Improvements
    1. Process R_ARM_TLS_IE32 relocations and creation of GOT sections.

Version 4.34.0

  • New features
    1. Added --warn-tls-order and --no-warn-tls-order command-line options to diagnose potential TLS-related errors in linker scripts.
    2. Added checks to detect if TLS data and regular data are mixed within a block.
  • Program corrections
    1. Blocks placed with place at statements using auto alignment may have incorrect sizes leading to placement errors. Fixed.

Version 4.32.2

  • Improvements
    1. The linker now supports line endings in Windows (CR+LF), Unix (LF), and MacOS/OS-9 (CR) formats on all platforms.

Version 4.32.1

  • Improvements
    1. The linker now indicates both forced alignment and forced padding for sections, if enabled, in the absolute listing.
  • Program corrections
    1. Linker did not respect set --pad-* options on late-included sections related to the initialization tables. Fixed.

Version 4.32.0

  • New features
    1. Added base statement to enable specification of region programming addresses.

Version 4.30.2

  • Program corrections
    1. Remove debug output from log file.
    2. Remove erroneous check of fixed-size blocks containing non-empty selectors.

Version 4.30.1

  • New features
    1. Enable conditional initialization of dynamic storage.

Version 4.24.2

  • Improvements
    1. Symbol list section in the map file now has a new subsection that lists symbols by decreasing size.

Version 4.24.1

  • New features
    1. Added warnings for unresolved weak symbols controlled by --warn-unresolved-weaks and --no-warn-unresolved-weaks.
  • Program corrections
    1. Exception tables and conditionally-initialized data were incorrectly classed as redundant and evicted when deduplication or inlining were enabled (Arm).

Version 4.22.1

  • Improvements
    1. Linker enhanced with early detection of conditionally-included sections enabling SEGGER real-time heap to be selected from emRun 4.10.

Version 4.22.0

  • New features
    1. Added Optimization Report section to the map file controlled by --map-optimization-report and --no-map-optimization-report.
  • Improvements
    1. Section deduplication applied in more cases.

Version 4.20.0

  • New features
    1. Added jump-threading optimization controlled by --thread-jumps and --no-thread-jumps (Arm).
    2. Map file extended with per-section and per-instruction optimization reports.
  • Improvements
    1. Section deduplication extended to cover sections with relocations.
    2. Faster linking for applications with large quantities of initialized data.

Version 4.18.1

  • Program corrections
    1. Corrected relaxation of function calls in certain out-of-bounds cases (RISC-V).

Version 4.18.0

  • New features
    1. The linker script is now subject to preprocessing. A complete C-like preprocessor with #define, #if, and #include processing is integrated into the linker.
    2. Added -I command line option to add directories to the preprocessor include path lookup.
    3. Added -D command line option to define preprocessor symbols on the command line.
  • Improvements
    1. Undefined symbol error messages now indicate the symbol, section, and file name of the source reference.

Version 4.16.1

  • Improvements
    1. Veneers were sometimes constructed even though unnecessary leading to suboptimal code; now veneers only constructed when absolutely required (Arm).

Version 4.16.0

  • Improvements
    1. Support relocation R_RISCV_SET16 (RISC-V).
    2. Support relocation R_RISCV_ADD16 and R_RISCV_SUB16 (RISC-V).
    3. Support relocation R_RISCV_ADD8 and R_RISCV_SUB8 (RISC-V).

Version 4.14.0

  • Improvements
    1. Support relocation R_ARM_THM_ALU_PREL_11_0 in Arm linker.
    2. Support relocation R_RISCV_PCREL_LO12_S in RISC-V linker.
    3. Support Andes-specific relocations in RISC-V linker.
  • Program corrections
    1. Avoid crash in disassembler when listing some RVP instructions in RISC-V linker.
    2. Initialization of data sections greater than 32k with LZSS compression could be wrong. Fixed.

Version 4.12.1

  • Program corrections
    1. Fix warning issued for veneered call to function in absolute section.

Version 4.12.0

  • Improvements
    1. Enable linking of functions declared to be absolute.

Version 4.10.1

  • Improvements
    1. Support architecture names 8.1-M.main and 8.1-M.base.

Version 4.10.0

  • New features
    1. Added define access statement.
    2. Added support for keeping sections by name, controlled by --keep-section option.
    3. Added support for conditionally keeping initialization arrays, controlled by --keep-init-array option.
  • Improvements
    1. Support R_RISCV_32_PCREL relocation in RISC-V linker.

Version 4.8.0

  • New features
    1. Added support for Andes Performance Extension controlled by --andes-performance-extension and --no-andes-performance-extension options.
    2. Added support for Huawei custom extension by --huawei-extension and --no-huawei-extension options.
  • Program corrections
    1. Fix missing end-table tag on HTML section detail output.
    2. Fix generation of error message when calling undefined weak symbols in A32 code.

Version 4.6.0

  • New features
    1. Added support for AndeStar CoDense code compression controlled by --instruction-tables and --no-instruction-tables options.
    2. Added "unused input file" map section controlled by --map-unused-inputs and --no-map-unused-inputs options.
    3. Added "unused memory ranges" map section controlled by --map-unused-memory and --no-map-unused-memory options.
  • Program changes
    1. String merging is unavailable on Arm targets.

Version 4.4.1

  • New features
    1. Added code outlining parameterization controlled by --outline-strand-size option.
    2. Added option statement to linker script language.
  • Program corrections
    1. Prevent error if --keep command line switch specifies a non-existent symbol.

Version 4.4.0

  • New features
    1. Added code outlining capability controlled by --outline and --no-outline options.
    2. Added tail merging capability controlled by --tail-merge and --no-tail-merge options.
  • Improvements
    1. If the linker-created initialization table is not referenced in the startup code, it is not included in the linked application.
  • Program corrections
    1. String merging could inadvertently evict required initialization array sections. Fixed.

Version 4.2.1

  • Improvements
    1. Required non-allocatable sections are silently converted to allocatable sections rather than eliciting a warning.

Version 4.2.0

  • New features
    1. Added section merging capability controlled by --merge-sections and --no-merge-sections options.
  • Improvements
    1. Linker-created data is now itemized in the Module Summary section.

Version 4.0.1

  • New features
    1. Architecture mismatch detection and warning controlled by --warn-arch-mismatch and --no-warn-arch-mismatch options.

Version 4.0.0

  • New features
    1. Added support for RISC-V processors.

Version 3.20.5

  • Improvements
    1. Unconditionally generate region symbols when requested, rather than generating only the region symbols used by the linked application. This enables the Embedded Studio IDE to display firmware regions in the Output and Memory Use windows.

Version 3.20.4

  • New features
    1. Added --warn-deprecated and --no-warn-deprecated to advise of scheduled changes.

Version 3.20.2

  • New features
    1. Added assert statement.

Version 3.20.0

  • New features
    1. Detection of unintended/any use of "double" AEABI functions controlled by --warn-all-double, --warn-unintended-double, and --no-warn-double.
    2. Demand-load of appropriate archives controlled by --lazy-load-archives and --no-lazy-load-archives which can improve linker performance with very large archives (> 20 MB).
    3. Optimization of C++ exception handling tables controlled by --optimize-exception-table and --no-optimize-exception-table.
    4. Demangling of C++ names in the map file and diagnostic messages controlled by --pretty-symbol-names, --no-pretty-symbol-names, --pretty-section-names, and --no-pretty-section-names.
    5. Address and size formats in the map file controlled by --map-addr-format and --map-size-format.
    6. Wrapping or truncation of excessive-width columns in the map file controlled by --map-wrap and --no-map-wrap.
    7. Inclusion of exception table section in map file controlled by --map-exception-table and --no-map-exception-table.
    8. Control of per-section cross reference in the map file absolute listing controlled by --map-listing-xref and --no-map-listing-xref.
    9. Added --big-endian and --little-endian with support to link big-endian images.
  • Improvements
    1. Lists of sections and/or symbols are always ordered by symbol name or symbol address if only one one sort criterion makes sense.
    2. Lists of sections and values are always ordered by symbol/section name and then value, or by value and then symbol/section name to enforce a consistent sort order.
    3. Linker-created symbols are shown in symbol lists only if they are used in order to avoid clutter.
    4. Initialization table section is expanded with a better presentation.
    5. Module summary section now breaks out input object files and input object archives for a better summary presentation.
    6. Linker modified to process R_ARM_TARGET2 relocations identically to the GNU linker. This is in conflict with the handling of R_ARM_TARGET2 defined by the document "ELF for the Arm Architecture", ARM Limited, but is required to make C++ exception handling work with the existing GCC, clang, and libunwind framework. Only use with the GNU and clang toolsets is guaranteed and tested to work with this change.
    7. Creation of synthetic output sections for fixed-size blocks created in the linker script that combine no sections (e.g. stack and heap blocks). This assists Embedded Studio to display memory usage after build, or in the Memory Usage window, accurately.


Version 4.18.0

  • Improvements
    1. Improved complex division so it will not overflow at extreme values.
    1. Slight improvement in speed and code size for floating conversion.
    1. offsetof() is configured through __SEGGER_RTL_OFFSETOF() and for GNU compilers reduces to __builtin_offsetof() (by default).

Version 4.16.0

  • New features
    1. Added printf_l(), sprintf_l(), snprintf_l(), vprintf_l(), vsprintf_l(), vsnprintf_l().
    2. Added fprintf_l(), vfprintf_l(), asprintf_l(), vasprintf_l().
    3. Added scanf_l(), sscanf_l(), vscanf_l(), vsscanf_l(), fscanf_l(), vfscanf_l().
  • Corrections
    1. Corrected modf() for arguments in range [1, 2).

Version 4.14.1

  • Improvements
    1. Sample configurations updated to eliminate unused variable warnings when compiled with these warnings enabled.
  • Corrections
    1. Definition of MB_CUR_MAX corrected.

Version 4.14.0

  • New features
    1. Added <signal.h> header file with signal() and raise().
    2. Added __muldc3(), __multc3(), __divdc3(), __divtc3().
    3. Improved performance of C-coded memmove(), memcmp(), and strcmp().
    4. Added option to use assembly-coded memcpy() and memset().
  • Improvements
    1. Added documentation relating to thread safety.
    2. Locale functions made thread-safe.
    3. Added stub functions to support free and aligned allocation in minimal and low-overhead heaps.
    4. Added stream flush support across all example I/O implementations such that C++ applications using iostream classes link cleanly.
    5. Removed undocumented __SEGGER_RTL_X_locale_name_buffer[] and added documentation for __SEGGER_RTL_set_locale_name_buffer().
  • Corrections
    1. In some circumstances a misaligned store could occur with the C-coded memcpy(). Fixed.

Version 4.12.1

  • Corrections
    1. Corrected strcasestr().

Version 4.12.0

  • Improvements
    1. Faster C-coded strcpy(), memcpy(), and memchr() using optional loop unrolling.
  • Corrections
    1. Add <signal.h> to distribution.

Version 4.10.0

  • New features
    1. Added real-time and minimal (alloc-only) dynamic storage managers.
    2. Added __SEGGER_RTL_init_heap() and removed static heap size configuration.
    3. Added aligned_alloc().
    4. Added uselocale().
    5. Added isascii(), isascii_l().
    6. Added wcstol(), wcstoll(), wcstoul(), wcstoull(), wcstof(), wcstod(), wcstold().
    7. Added mbsnrtowcs(), mbnsrtowcs_l().
    8. Added wcsnrtombs(), wcsnrtombs_l().
    9. Added strcoll(), wcscoll().
    10. Added strxfrm(), wcsxfrm().
  • Improvements
    1. Faster C-coded memset() and memcmp() for balanced and speed configurations.
  • Corrections
    1. Fix incomplete I/O descriptor initialization in vsprintf().

Version 3.10.1

  • Improvements
    1. Better compatibility with assemblers that do not implement generic immediate handling (RISC-V).
    2. Example implementation of low-level I/O return character count rather than 0 for success.
    3. For internal emRun use, always call assembly-coded string functions if they are selected.
  • Corrections
    1. Fix for incorrect register when Zbb architecture is selected (RISC-V).

Version 3.10.0

  • New features
    1. Added standard file system support.
    2. Added support for RV64 architectures (RISC-V).
    3. Added support for 128-bit integers (RISC-V).
  • Improvements
    1. Faster C-based strlen(), strnlen(), strcmp(), strncmp(), strchr(), strnchr(), strrchr(), memchr().
    2. Selection of float-only I/O does not force inclusion of double arithmetic.
    3. Faster integer division algorithms for 64-bit types (RISC-V).
    4. Faster double-floating division algorithms on 64-bit architectures (RISC-V).

Version 2.30.0

  • New features
    1. Added support for half-precision floating point.

Version 2.28.2

  • New features
    1. Added sincos(), sincosf(), sincosl().
    2. Added support for long double I/O of 128-bit floating values using '%Lf' and similar format specifiers (RISC-V).
    3. Added __SEGGER_RTL_NO_BUILTIN to poison certain compiler transformations that are invalid when compiling the runtime library at high optimization levels.

Version 2.28.1

  • Corrections
    1. Align prinops.c and wprinops.c selection of formatting features and avoid compilation error when floating output is excluded from the build.

Version 2.28.0

  • New features
    1. Upgraded to emFloat 2.8.0.
    2. Added implementation of __popcountsi2() and __popcountdi2().
    3. Added implementation of __paritysi2() and __paritydi2().
    4. Added balanced long long division algorithm for v4T and v7A (ARM).
    5. Added size-optimized long long division algorithm for v4T and v7A (ARM).
  • Improvements
    1. Improved 64-bit multiplication speed for v6M/v8M (ARM).
    2. Improved 64-bit division speed for v6M (ARM).
    3. Improved 64-bit division speed for v4T and v5TE (ARM).
    4. Improved 32-bit and 64-bit multiplication speed for cores that lack M extension (RISC-V).
    5. Improved signed and unsigned 64-bit division speed for v8M.Baseline by utilizing integer divide instruction (ARM).
    6. Improved integer division speed for cores that have M extension but lack a divider (RISC-V).
    7. Improved long long to double conversion for D extension (RISC-V).
    8. Improved unsigned long long to double conversion for D extension (RISC-V).
    9. Improved __unordsf2() and __unorddf2() for F and D extensions (RISC-V).
    10. Improved scaled-integer tanf() size and speed using Möller-Granlund division.
    11. Improved generic floating divide using Möller-Granlund division.
    12. Improved floating-point to integer conversions to use floating point instructions where possible for F and D extensions (RISC-V).
    13. Improved floating-point to integer conversions to use fast and configurable integer normalization (RISC-V).
    14. Sample configuration file no longer relies on builtins for fabs() and fabsf() (RISC-V).

Version 2.26.1

  • Improvements
    1. Further simplified I/O implementation examples.
  • Corrections
    1. Activated MLS instruction for architectures v7 and later (Arm).
    2. Corrected definition of strlen(x) macro in example configuration (RISC-V).

Version 2.26.0

  • New features
    1. Added <fenv.h> and corresponding floating-point environment functions.
  • Improvements
    1. Added detection and configuration for SIMD extension (RISC-V).
    2. Added detection and configuration for bit manipulation extension (RISC-V).
    3. Added detection and configuration for Andes Performance Extension (RISC-V).
    4. All floating-point functions automatically adapt for balanced performance on typical RISC-V devices.
    5. Faster floating-point arithmetic and conversions when SIMD extension present (RISC-V).
    6. Faster floating-point arithmetic and conversions when bit manipulation extension present (RISC-V).
    7. Faster floating-point arithmetic and conversions when Andes Performance extension present (RISC-V).
    8. Faster floating-point arithmetic for base RISC-V ISA when multiplier is present (RV32E).
    9. Faster 64-bit division for architectures lacking divide instructions (Arm).
    10. Small revisions of floating-point functions leading to smaller and faster code (Arm).
    11. Further optimized strlen(), strcmp(), strcpy(), and strchr() when configured for more speed (Arm).
    12. Further optimized strlen(), strcmp(), strcpy(), and strchr() when configured for more speed (RISC-V).
    13. Revision of I/O framework for easier customer configuration.
  • Program corrections
    1. Corrected __aeabi_dcmpun() (Arm).

Version 2.24.0

  • New features
    1. Added strtold().
  • Improvements
    1. Faster double to integer conversion when FPU supports IEEE double.

Version 2.22.0

  • Improvements
    1. Optimized strlen(), strcmp(), and strchr() when configured for more speed (Arm).
    2. Optimized strlen(), strcmp(), and strchr() when configured for more speed (RISC-V).

Version 2.20.0

  • New features
    1. Supply full set of functions for emulated 128-bit long double on RISC-V.
    2. Use fast memcpy() and fast memset() in balanced mode (Arm).
    3. Use fast strcpy() and fast strcmp() in balanced mode (RISC-V).

Version 2.4.2

  • Program corrections
    1. Fix corruption of register r3 for __aeabi_ldivmod() and __aeabi_uldivmod() on Thumb builds for v4T architecture.
    2. Correct highly infrequent misrounding (by 1 ulp) of single-precision quotient on architectures that have no fast divide but do have fast multiply.

This document was first released with SEGGER Toolchain on 09. Oct 2020